Category 4 of the list of dual-use goods

a.	“software” specially designed or modified for the “development” or “production” of equipment or “software” specified in 4A001 to 4A004 or in subcategory 4D;

“software” other than that specified in 4D001.a., specially designed or modified for the “development” or “production” of equipment, as follows:

1.	“digital computers” having a “peak corrected performance” (PCC) exceeding 6.0 weighted teraflops (TP);

2.	“electronic assemblies” specially designed or modified to enhance performance by aggregating processors such that the “PCC” of the aggregation exceeds the limit defined in 4D001.b.1.

4D002 - Not used.

4D003 - Not used.

4D004 - “Software” specially designed or modified for the generation, operation or delivery of “intrusion software”, or for communication with the same.

4E001 -

a.	“Technology”, within the meaning of the General Technology Note, for the “development”, “production” or “use” of equipment or “software” referred to in subcategories 4A or 4D.

“Technology” other than that specified in 4E001.a., specially designed or modified for the “development” or “production” of equipment, as follows:

1.	“digital computers” having a “peak corrected performance” (PCC) exceeding 6.0 weighted teraflops (TP);

2.	“electronic assemblies” specially designed or modified to enhance performance by aggregating processors such that the “PCC” of the aggregation exceeds the limit defined in 4E001.b.1.

c.	“Technology” for the “development” of “intrusion software”.

“PCC” is a corrected peak rate at which “digital computers” perform floating-point additions and multiplications of 64 bits or more.

“PCC” is expressed in weighted teraflops (TP), in units of 10 12 corrected floating point operations per second.

For each processor i, determine the maximum number of 64-bit or greater floating point operations, OVF i , executed per cycle for each processor in the “digital computer”.

Note

To determine OVF, include only additions and/or multiplications of 64 bits or more. All floating point operations must be expressed in operations per processor cycle; operations that require multiple cycles can be expressed as fractional results per cycle. For processors incapable of performing calculations on floating point operands of 64 bits or more, the calculated effective speed V is zero.

Calculate the floating point speed V for each processor V i = OVF i /t i .

Calculate “PCC” as “PCC” = W 1 × V 1 + W 2 × V 2 + … + W n × V n .

For 'vector processors', W i = 0.9. For non-vector 'processors', W i = 0.3.

Note 1

For processors performing compound operations within a cycle, such as additions and multiplications, each operation is counted.

Note 2

For a pipelined processor, the calculated effective speed V is the pipelined speed (once the pipeline is full) or the non-pipelined speed, whichever is the higher.

Note 3

The calculated speed V of each processor involved must be aggregated below its theoretically possible maximum value, before the “PCC” of the combination is deduced. Concurrent operations are assumed to exist when the calculator manufacturer stipulates, in a calculator manual or brochure, the existence of operation or execution in concurrent, parallel or simultaneous mode.

Note 4

Processors that are limited to input-output functions or peripheral functions (e.g. disk drives, communications and video displays) are not included in the "PCC" calculation.

Note 5

“PCC” values shall not be calculated for combinations of processors (inter)connected by local area networks, wide area networks, shared input/output connections/devices, input/output controllers and any communications interconnections implemented work by “software”.

Note 6

“PCC” values shall be calculated for processor combinations comprising processors specially designed to improve performance by aggregation, operating simultaneously and sharing their memory;

Technical note:

1.	All processors and accelerators operating simultaneously and located on the same die must be aggregated.

2.	Combinations of processors sharing their memory where a processor is capable of accessing a system memory location by hardware transmission of cache lines or memory words, without the intervention of software mechanisms, which can be achieved by using “electronic assemblies” specified in 4A003.c.

Note 7

A 'vector processor' is defined as a processor having embedded instructions that aim to simultaneously perform multiple calculations on floating point vectors (one-dimensional arrays of 64 bits or more), with at least 2 vector functional units and 8 vector registers d 'at least 64 elements each.

List of dual-use goods / category 4

CATEGORY 4 — CALCULATORS

4A001 - Electronic computers and related equipment having any of the following characteristics and “electronic assemblies” and their specially designed components:

4A003 - “Digital computers”, “electronic assemblies” and their related equipment, as follows, and specially designed components therefor:

4A004 - Computers as follows and specially designed related equipment, “electronic assemblies” and their components:

4A005 - Systems, equipment and components specially designed or modified for the generation, operation or delivery of "intrusion software", or for communication therewith.

4A101 - Analog computers, “digital computers” or digital differential analyzers, other than those specified in 4A001.a.1., of high ruggedness and designed or modified for use in space launch vehicles specified in 9A004 or rockets probes specified in 9A104.

4A102 - “Hybrid computers” specially designed for modeling, simulation or integration of space launch vehicles specified in 9A004 or sounding rockets specified in 9A104.

4D001 – “Software”, as follows:

4D002 - Not used.

4D003 - Not used.

4D004 - “Software” specially designed or modified for the generation, operation or delivery of “intrusion software”, or for communication with the same.

4E001 -